The present invention relates to a storage media reading/writing system, specifically to a reading/writing semiconductor integrated circuit that amplifies a signal read from a head or drives the head by a write signal in the storage media reading/writing system of the magnetic recording system, which is a technique effective for use in a hard disk drive.
Generally, the hard disk drive is provided on the side of a carriage 130, as shown in FIG. 23, with a reading/writing semiconductor integrated circuit (hereunder, referred to as read write IC) 220 that amplifies a signal read from a magnetic head or drives the magnetic head by a write signal to move an arm 120 furnished with the magnetic head for reading data stored in a magnetic disk 100 as storage media; and, the read write IC 220 and the magnetic head are connected usually with a bendable cable called the FPC (Flexible Printed Circuit). Further, in the hard disk drive containing plural magnetic disks as shown in FIG. 23, the read write IC is designed as an IC for multiple channels that processes, with one IC, the signals from the plural magnetic heads provided correspondingly with the plural magnetic disks each.
Differently from a semiconductor memory, the magnetic disk drive includes physically movable parts that delay the read and write speed of data, which is disadvantageous, and there is a demand for a still further increase in the speed. In order to enhance the data transfer speed in the magnetic disk drive, it is needed to increase the rotational speed of a disk, namely, a spindle motor, and also to accurately perform the servo control of a voice coil motor that moves the spindle motor and the carriage. Also, the read write IC is required for a high-performance circuit design, so as to amplify high frequency signals.
The applicant of this invention has succeeded in the development of a magnetic disk drive and a high-performance read write IC that permit such a high-speed rotation and an accurate servo control in the high-speed rotation and a high-frequency operation. However, the inventors found a problem that an increase of the data transfer speed will accompany a deterioration of the SN ratio relating to the read signal and the write signal. The inventors examined the cause and source of the problem, accordingly.
As the result, the inventors found that the noises of high-frequency components are created at the magnetic head (especially during writing), and in such a configuration that the read write IC is installed on the carriage and the magnetic head located on the front of the arm is connected to the read write IC with a cable, if the length of the cable is very long, it will function as an antenna to pick up high frequency noises; and the noises picked up by the cable deteriorate the SN ratio since a signal transmitted through the cable is very weak.
Accordingly, the inventors investigated the possibility of shortening the length of the cable that connects the magnetic head and the read write IC by installing the read write IC on the arm. However, the installation of the read write IC on the arm increases the weight of the arm, which interferes with the seek operation, and a large size IC is not permitted to be mounted on the arm. From such circumstances, the inventors reach an idea to divide the functions of the conventional read write IC into plural chips, and to install only the IC on the arm that is connected directly to the magnetic head and has a minimum configuration of a read amplifier and a write amplifier to electrically drive the head, whereby the aforementioned problem can be solved.
Now, in order to solve the problem similar to the above problem, the Japanese Published Unexamined Patent Application No. Hei 3(1991)-108120 discloses an IC that splits the read write IC and installs an IC including a control circuit on the side of the movable arm, and installs an IC chip having a write circuit or a read circuit on the side of the head slider. This prior art presents an example of an IC chip that reduces the load impedance of the write circuit to make a quick rise of the current, and has the write circuit to guarantee a good writing that is installed on the side of the head slider.
Further, this prior art describes that the wiring length between the head IC and the magnetic head has to be made as short as possible, since the noise level mixed in the reading signal is proportional to the wiring length between the head IC and the magnetic head and a longer wiring length produces larger noises. In other words, the prior art considers it desirable to provide an IC chip having a read circuit and a write circuit on the side of the head slider, in view of the characteristics of the read circuit and the write circuit; however, since such an arrangement increases the weight of the head slider to deteriorate the tracking ability, conceivably the invention proposes to provide the IC chip having the read circuit or the write circuit on the side of the head slider. At least, the prior art does not disclose at all the positive aspect of installing an IC chip having only the read circuit on the side of the head slider.
Further, in those days when the aforementioned prior art was proposed, the IC was sealed in a resin package in general, and there was not available a recently developed mounting technique that does not use a package, such as the flip chip. Therefore, the weight of the present IC is considerably reduced, compared to the times of the application of the prior art, and it becomes less significant in view of the weight to divide the read write IC into an IC chip including the control circuit installed on the side of the movable arm and an IC chip having the write circuit or the read circuit installed on the side of the head slider. In short, it is reasonable to understand the prior art, from the spirit of the invention to reduce the load impedance, as a technique maintaining it desirable to install an IC chip including the write circuit and the read circuit on the side of the head slider, when the problem of the weight is resolved.
However, the inventors of the present invention found a further problem that the installation of an IC chip having the write circuit and the read circuit on the side of the head slider, accompanying the adoption of the flip chip mounting technique, does not very much aggravate the tracking ability of the head, however the power consumption in the chip increases and generates more heat, whereby a suspending part of the head retaining means thermally deforms to deteriorate the positioning accuracy. Concretely, first the reading is executed in the write mode, and the positioning of the head is executed on the basis of the signal readout, and then the writing is started; however, provided that the write circuit is installed near the head, a great amount of currents flows during the writing to raise the temperature of the chip, which leads to a fear of thermally deforming the head suspending part, and finally dislocating the head.
Especially in the flip chip mounting technique, the thermal capacity of a chip diminishes by the extent that the chip does not wear a package, and the thermal transmission between the chip and the head suspending part is bettered in comparison to an IC sealed in a package; and therefore, the head suspending part becomes still easier to thermally deform (stretch and shrink). The aforementioned prior art does not disclose at all a conception of dividing the chip from the viewpoint of the thermal deformation of the head suspending part, accompanied with a heat generated in the chip.
It is therefore an object of the invention to provide a storage media reading/writing system that prevents a thermal deformation of the head suspending part due to the write current, and achieves a highly accurate writing and reading.
Another object of the invention is to provide a storage media reading/writing system that permits the reading of data at a high speed without lowering the SN ratio.
Another object of the invention is to provide a storage media reading/writing system that permits the reading and writing of data at a high speed without a hindrance to the seek operation.
The foregoing and other objects and the novel features of the present invention will become apparent from the descriptions and the accompanying drawings of this specification.
The typical aspects of the invention disclosed in this application will be outlined as follows.
According to one aspect of the invention, the storage media recording/writing system includes a media drive circuit, a head retaining means, a head moving means, a head drive circuit, a signal processing circuit, and a controller. Further, the head drive circuit includes a first semiconductor integrated circuit having an amplifier that amplifies the read signal from the head, and a second semiconductor integrated circuit arranged between the first semiconductor integrated circuit and the signal processing circuit, which has a circuit that receives write data from the signal processing circuit and generates a drive signal to drive a write head. The head is mounted on the front of the head retaining means, and the first semiconductor integrated circuit is mounted on a part near the front, and the second semiconductor integrated circuit is installed on the side of the moving means.
According to the forgoing construction, the semiconductor integrated circuit to electrically drive the head is made up with two semiconductor integrated circuits, in which the first semiconductor integrated circuit having a read circuit is disposed on a part near the front of the head retaining means (arm), and the second semiconductor integrated circuit having a write circuit is disposed on the side of the head moving means (carriage). Therefore, if a write current flowing through the second semiconductor integrated circuit during writing raises a temperature of the chip, the head retaining means is unsusceptible to transmission of a heat, and is able to avoid a displacement of the head due to the heat generated. The construction also shortens the signal lines connecting the head and the semiconductor integrated circuit containing the read circuit to make the signal lines immune from noises, and thereby achieves a data reading at a high speed without deteriorating the SN ratio. Further, the semiconductor integrated circuit to electrically drive the head is constituted by two semiconductor integrated circuits, and one is mounted on the head retaining means (arm) and the other one is mounted on the head moving means (carriage); and accordingly, the system succeeds in restricting the weight increase of the semiconductor integrated circuit mounted on the arm to thereby achieve a high-speed reading and writing without a hindrance to the seek operation.
Further, when the head retaining means has an immovable part (base part) disposed near the moving means and a movable part (suspending part) disposed to face the recording media, it is preferable to install the first semiconductor integrated circuit on the movable part of the head retaining means. This construction shortens the distance between the head and the first semiconductor integrated circuit containing the read circuit, compared to a case of the first semiconductor integrated circuit being installed on the immovable part, and makes the read signal lines still more immune from noises.
Also, it is preferable to make up the immovable part of the head retaining means with a member of a high rigidity, and to make up the movable part with a thin plate member having a more elasticity than that of the immovable part. The front of the head retaining means is needed to deform, when the recording media rotates to generate a buoyancy acted on the head, and it is possible to use a head retaining member whose cross-sectional area decreases gradually toward the front; however, it is more advantageous in view of workability to make up the immovable part with a member of a high rigidity, and the movable part with a thin plate member having an elasticity.
According to another aspect of the invention, in the storage media recording/writing system, the first semiconductor integrated circuit and the second integrated circuit are connected with a bendable wiring cable, and the first semiconductor integrated circuit is coupled with the wiring cable through bumps of a fusible metal on a specific position thereof. This construction allows connection of the two semiconductor integrated circuits with a general-purpose cable such as a FPC, and facilitates the coupling of the cable and the first semiconductor integrated circuit, thus achieving reduction of the cost.
According to another aspect of the invention, the head is driven by a voltage signal from the write circuit provided in the second integrated circuit. The drive of the head by the voltage signal permits lowering the output impedance of the write circuit, thereby enhancing the settling of the current flowing through the head, and achieving a high-speed writing.
According to another aspect of the invention, the circuit to generate the drive signal supplied to the head for writing includes a resistor for an impedance matching that has the same resistance as the characteristic impedance of a wiring to connect the head and the second semiconductor integrated circuit. This construction prevents a signal reflection at the end of the signal line to achieve a high-speed writing. Here, the resistor for the impedance matching is preferably configured with a variable resistor such that the resistance can be adjusted. Thereby, if the length of the wiring to connect the head and the second semiconductor integrated circuit containing the write circuit and the type of the cable used are different in the system, the resistance can be adjusted to overcome the differences.
According to another aspect of the invention, on the first semiconductor integrated circuit, the bumps for terminals connecting with the second semiconductor integrated circuit are arrayed along one side of a chip on which the first semiconductor integrated circuit is formed, and the bumps for terminals connecting with the head are arrayed along the other side of the chip. Further, two rows of the bumps are mounted on the wiring cable along the cross direction thereof. Thereby, the breadth of the wiring cable can be reduced, compared with a case of the bump rows arrayed along the longitudinal direction of the cable.
According to another aspect of the invention, the first semiconductor integrated circuit includes a compensation circuit that compensates a deterioration of a frequency characteristic of a gain and a bandwidth, accompanied with dispersions of the resistance of the head. This restricts a deterioration of the frequency characteristic of the gain and the bandwidth, even if there are dispersions of the resistance of the head.
According to another aspect of the invention, the first semiconductor integrated circuit and the second semiconductor integrated circuit are connected to each other with two power supply lines and two transmission lines. This construction reduces the number of the signal lines, and achieves a further weight reduction of the head retaining means to realize a smooth and accurate seek operation of the arm.
According to another aspect of the invention, the head is configured with a read head and a write head. The employment of a head suitable for reading and a head suitable for writing allows a high-speed reading/writing and a high-accuracy reading/writing.
Further, preferably the first semiconductor integrated circuit and the second semiconductor integrated circuit are connected to each other only with two power supply lines and two transmission lines. This facilitates the assembly work of the head, and further reduces the weight of the arm that retains the head, which effects a further smooth and accurate seek operation of the arm.
According to another aspect of the invention, when the system incorporates a plurality of the heads, a plurality of the first semiconductor integrated circuits are provided corresponding to the number of the heads, and the second semiconductor integrated circuit is provided as a common circuit to a plurality of the first semiconductor integrated circuits. This reduces the number of the chips constituting the system, and facilitates the assembly.